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MAX16929
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
t R-V = SH SCHOTTKY
t F-V = SH SCHOTTKY
I IN(DC,MAX)
t R-I =
I IN(DC,MAX)
t F-I =
I DRVN = BE +
I DR = LOAD
Boost Converter
Power dissipation in the boost converter is primarily due
to conduction and switching losses in the low-side FET.
Conduction loss is produced by the inductor current
flowing through the on-resistance of the FET during the
on-time. Switching loss occurs during switching transi-
tions and is a result of the finite time needed to fully turn
on and off the FET. Power dissipation in the boost con-
verter can be estimated with the following formula:
P LXP ≈ [(I IN(DC,MAX) × √ D ) 2 × R DS_ON(LXP) ] + V SH ×
I IN(DC,MAX) × f SW × [(t R-V + t F-I ) + (t R-I + t F-V )]
where I IN(DC,MAX) is the maximum expected average
input (i.e., inductor) current, D is the duty cycle of the
boost converter, R DS_ON(LXP) is the on-resistance of
the internal low-side FET, V SH is the output voltage, and
f SW is the switching frequency of the boost converter.
R DS_ON(LXP) is 110m I (typ) and f SW is 2.2MHz.
The voltage and current rise and fall times at the LXP
node are equal to t R-V (voltage rise time), t F-V (voltage fall
time), t R-I (current rise time), and t F-I (current fall time),
and are determined as follows:
V + V
K R-V
V + V
K F-V
K R-I
K F-I
K R-V , K F-V , K R-I , and K F-I are the voltage and current
slew rates of the LXP node and are supply dependent.
Use Table 5 to determine their values.
Positive-Gate Voltage Regulator
Use the lowest number of charge-pump stages possible
in supplying power to the positive-gate voltage regulator.
Doing so minimizes the drain-source voltage of the inte-
grated pMOS switch and power dissipation. The power
dissipated in the switch is given as:
P GH = (V CP - V GH ) × I LOAD(MAX)_GH
Ensure that the voltage on CP does not exceed the
CP overvoltage threshold as given in the Electrical
Characteristics table.
Negative-Gate Voltage Regulator
Use the lowest number of charge-pump stages possible
to provide the negative voltage to the negative-gate
voltage regulator. Estimate the power dissipated in the
negative-gate voltage regulator using the following:
P GL = (V INA + |V CN | - V BE ) × I DRVN
where V BE is the base-emitter voltage of the external npn
bipolar transistor, and I DRVN is the current sourced from
DRVN to the R BE bias resistor and to the base of the
transistor, which is given by:
V I GL
R BE h FE +1
1.8V/3.3V Regulator Controller
The power dissipated in the 1.8V/3.3V regulator controller
is given by:
P REG = (V INA - V OUT_REG - V BE ) × I DR
where V OUT_REG = 1.8V or 3.3V, V BE is the base-emitter
voltage of the external npn bipolar transistor, and I DR is
the current sourced from DR to the base of the transistor.
I DR is given by:
I
h FE + 1
where I LOAD is load current of the 1.8V/3.3V regulator
controller, and h FE is the current gain of the transistor.
Table 5. LXP Voltage and Current Slew Rates vs. Supply Voltage
LXP VOLTAGE AND CURRENT SLEW RATES
V INA (V)
3.3
5
RISING VOLTAGE
SLEW RATE
K R-V (V/ns)
0.52
1.35
FALLING VOLTAGE
SLEW RATE
K F-V (V/ns)
1.7
2
RISING CURRENT
SLEW RATE
K R-I (A/ns)
0.13
0.3
FALLING CURRENT
SLEW RATE
K F-I (A/ns)
0.38
0.44
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